Capability details
What this helps you do
Construct circuit models in Python and interface with SPICE simulators.
Catalog editorial description
View description sources
editor · 2026-09-19 — Catalog classification and summary; not maintainer acknowledgement.
Research classification
Electrical engineering, electronic engineering, information engineering
View discipline evidence
editor · 2026-09-19 — Core research task classification from pinned primary documentation. 2.2 电气工程、电子工程与信息工程：依据固定上游用途及所列官方补充材料作出的策展判断。项目和核心工具均限于上述用途，跨领域框架不强制收窄。
Who it is for
An intended audience has not been supplied. Check the original documentation for suitability and prerequisites.
How to use it
Follow upstream guidance and source conditions.
AIPOCH has not verified execution.
Read usage documentationInputs
- 电路模型、网表、激励
Outputs
- 电路仿真数据
Resource type
Tool
Access conditions
- GPLv3（按上游声明）
- Ngspice/Xyce及元件模型各有条件；本轮未安装仿真器。 作者2024维护说明为业余项目，响应可能较慢；未据此推断停更。
- Community indexing of core software only. External components, models, datasets and services have separate terms. Installation, scientific accuracy and suitability were not validated.
View usage information sources
Inputs
editor · 2026-09-19 — Catalog classification and summary; not maintainer acknowledgement.
Outputs
editor · 2026-09-19 — Catalog classification and summary; not maintainer acknowledgement.
Access conditions
editor · 2026-09-19 — Catalog classification and summary; not maintainer acknowledgement.
Documentation
editor · 2026-09-19 — Catalog classification and summary; not maintainer acknowledgement.
Sources & versions
- Reference role
- implementation
- Last successful public check
- 2026-09-22T08:39:14.146Z
- Latest public check attempt
- 2026-09-22T08:39:14.146Z · ok
- GitHub metrics
- Stars 866 · checked · latest attempt 2026-09-22T08:39:14.146Z (ok)
Forks 211 · checked · latest attempt 2026-09-22T08:39:14.146Z (ok) - Latest default-branch commit
- Unknown
- Source activity check
- missing · last successful check unknown · latest attempt 2026-09-22T08:39:14.146Z (unavailable)
- Source status
- Active at last observation
- License
- GPL-3.0
- Fixed commit
fe08718d5a1a9af94576b5aef1fa81910f09b037- Reference checked
- 2026-09-19
Default-branch activity is separate from the fixed reference above. Source terms apply. A fixed commit identifies content; it does not establish scientific validity.
Related research
Construct circuit models in Python and interface with SPICE simulators.
Claims & evidence
Continue the conversation
Research questions and code contributions belong with the original project. Catalog corrections can be proposed separately.